Machine Instruction


Q21.

Compared to CISC processors,RISC processors contain
GateOverflow

Q22.

How many number of times the instruction sequence below will loop before coming out of the loop? MOV AL, 00H A1: INC AL JNZ A1
GateOverflow

Q23.

Assume that 16-bit CPU is trying to access a double word stating at an odd address. How many memory operations are required to access the data?
GateOverflow

Q24.

Find the memory address of the next instruction executed by the microprocessor (8086), when operated in real mode for CS=1000 and IP=E000
GateOverflow

Q25.

The use of multiple register windows with overlap causes a reduction in the number of memory accesses for: I. Function locals and parameters II. Register saves and restores III. Instruction fetches
GateOverflow

Q26.

Which of the following architecture is/are not suitable for realising SIMD?
GateOverflow

Q27.

The Memory Address Register
GateOverflow

Q28.

A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which one of the following is a legal program counter (all values in decimal)?
GateOverflow

Q29.

Consider these two functions and two statements S1 and S2 about them. S1 : The transformation from work 1 to work 2 is valid, i.e., for any program state and input arguments, work 2 will compute the same output and have the same effect on program state as work 1 S2 : All the transformations applied to work 1 to get work 2 will always improve the performance (i.e. reduce CPU time) of work 2 compared to work 1
GateOverflow

Q30.

The use of multiple register windows with overlap causes a reduction in the number of memory accesses for I. Function locals and parameters II. Register saves and restores III. Instruction fetches
GateOverflow